From Maxwell to Circuits --modeling and simulation for interconnect

In this talk, Interconnect simulation Problems are discussed.
The topic is from the design of system on chip(SOC). From Maxwell equations
to circuits model, partial element equivalent circuits(PEEC) are deduced,
and reduction order model(ROM) are used for reducing the size of circuits.
Parasitic extraction method and model for capacitance, resistance and inductance(RLC)
are also introduced.